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JR0206801 - Pre-Si Verification Engineer
Come and join us. Intel is seeking highly qualified candidates to join our Ethernet Products Group (EPG), part of the Network and Edge Group (NEX), as a Pre-Silicon Verification Engineer. Within Intel's EPG join a creative team of silicon engineers dedicated to designing the hardware technologies that network the leading cloud service and telecommunication datacenters. You will join a close-knit team responsible for building efficient and effective constrained random verification environments that exercise designs through their corner cases and verify that the design matches a golden model.
Responsibilities will include, but are not limited to:
- Responsible for the full lifecycle of verification from planning to test execution and include collecting and closing coverage.
- Work closely interface with architecture and design teams to understand design product requirements and develop comprehensive test plans.
- Conduct, participate in test plan and test reviews, develop verification components, and tests and triage failures.
- Mentor and provide guidance to junior verification engineers in the execution of their tasks.
Candidates must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed below would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
- Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of industry work experience
Minimum Qualifications: - 3 + years of experience verifying complex designs both at the component and full chip level - 3+ years of experience in architecting and developing testbenches and verification components like bus functional models and scoreboards/checkers
- 2+ years of experience in SystemVerilog based UVM, OVM, VMM or related object oriented, and coverage driven ASIC verification methodology.
- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 3 years of industry work experience - Experience in verifying complex designs both at the component and full chip level - Experience with TCP IP - Experience with Remote Direct Memory Access protocols eg iWARP or RoCE - Experience in Ethernet Networking verification or logic design - Experience in software development and scripting
Inside this Business Group
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
Virtual US and Canada
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Annual Salary Range for jobs which could be performed in US, Colorado: $113,500.00-$170,120.00
Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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